Hubert Garavel - Curriculum Vitae

1981-1983: Baccalauréat C (mention B, académie de Lyon). Mathématiques supérieures et spéciales au Lycée du Parc (Lyon)
1983-1986: Engineering degree in computer science from Ecole Nationale Supérieure d'Informatique et de Mathématiques Appliquées de Grenoble (ENSIMAG)
1986: Diplôme d'Etudes Approfondies (MsC) in computer science from Institut National Polytechnique de Grenoble (INPG)
1986-1989: Doctorate degree (PhD) in computer science from Université Joseph Fourier of Grenoble (UJF).
Thesis title: Compilation et vérification de programmes LOTOS. Jury: Jacky Barré, Gérard Berry (rapporteur), Ed Brinksma (rapporteur), Joseph Sifakis, Jean-Pierre Verjus (president) et Jacques Voiron (supervisor)
1990: Laureate of the IBM-France prize in computer science

1989-1992: Computer science engineer at Verilog Rhône-Alpes. Design of Veda-2, a compiler and verification tool for the language Estelle. Specification of the compiler and code generator parts of the Saga/Sao+ tool for the Lustre language
1993-1996: Chargé de recherche INRIA (research officer) in the Spectre project
1997-2002: Chargé de recherche INRIA and group leader of the VASY-RA team (1997-1999) and the VASY project (2000-now)
2002: Directeur de recherche INRIA

1993-1994: Deputy project manager of the European/Canadian project EUCALYPTUS-1
1995-1996: Project manager of the European/Canadian project EUCALYPTUS-2
1994-1997: French delegate and chairman of Working Group 1 in the pan-European action COST-247 on formal verification and validation methods
1993-1999: French delegate in the standardization committee ISO/IEC JTC1/SC21/WG7 "Enhancements to LOTOS"
1996-2007: Scientific (co-)supervisor of five collaborative projects between Bull and INRIA (Dyade/Vasy, Dyade/FormalCard, Dyade/FormalFame, FormalFame, and FormalFame +)
1998-1999: Project manager of the joint research action VERDON
1999-2002: Chairman of FMICS, the ERCIM Working Group on Formal Methods for Industrially Critical Systems
2001-2003: Member of the Advisory Board of the national technology transfer project PARFUMS
2002: Member of the Steering Committee of ETAPS (European Joint Conferences on Theory and Practice of Software)
2002-2005: Member of the Budget Commission of INRIA Rhône-Alpes
2004-now: Member of the Scientific Board of the System-on-Chip pilot research center between CEA/LETI and INRIA
2004-2007: Co-leader (with Jaco van de Pol) of the SENVA Joint Research Team between CWI and INRIA
2005-now: Member of the Steering Board of the TOPCASED consortium
2005-now: Member of the Operational Committee of Minalogic/EMSOC (Embedded System on Chip)
2006-now: Member of IFIP Working Group 1.8 on Concurrency Theory
2006-now: Member of the Steering Committee of Minalogic's MULTIVAL project
2007-now: Member of the Scientific Council of GIS 3SGS

